Today is: Monday March 17, 2025
This site contains information on measurement results from my Master's Thesis Measurement Board design.
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Sine Wave @ 30MHz; Time Domain -
Sine Wave @ 30MHz; Frequency Domain; Spurs are due to Signal Clipping at ADC Input. -
Sine Wave @ 30MHz; Decimated by 8; Frequency Domain; Spurs are due to Signal Clipping at ADC Input. -
Sine Wave @ 30MHz; Time Domain; ADC Data on top of DAC Data
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Sine Wave @ 40MHz; Time Domain -
Sine Wave @ 40MHz; Frequency Domain; Spurs are due to Signal Clipping at ADC Input. -
Sine Wave @ 40MHz; Decimated by 4; Frequency Domain; Spurs are due to Signal Clipping at ADC Input. -
Sine Wave @ 40MHz; Time Domain; ADC Data on top of DAC Data
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Sine Wave @ 80MHz; Time Domain -
Sine Wave @ 80MHz; Frequency Domain -
Sine Wave @ 80MHz; Decimated by 2; Frequency Domain -
Sine Wave @ 80MHz; Time Domain; ADC Data on top of DAC Data
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Sine Wave @ 110MHz; Time Domain -
Sine Wave @ 110MHz; Frequency Domain -
Sine Wave @ 110MHz; Decimated by 2; Frequency Domain -
Sine Wave @ 110MHz; Time Domain; ADC Data on top of DAC Data
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Sine Wave @ 80MHz, 90MHz, and 100MHz; Time Domain -
Sine Wave @ 80MHz, 90MHz, and 100MHz; Frequency Domain -
Sine Wave @ 80MHz, 90MHz, and 100MHz; Decimated by 2; Frequency Domain -
Sine Wave @ 80MHz, 90MHz, and 100MHz; Time Domain; ADC Data on top of DAC Data
Jeremy W. Webb Graduate Student Electrical and Computer Engineering Department One Shields Avenue Davis, CA 95616
Last Modified: Monday, March 27, 2017 10:19:56 PM
